Remote-processing RPC-2350 Bedienungsanleitung Seite 58

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CHAPTER 14 MULTI-MODE COUNTER
14-3
Figure 14-1 Counter and jumper location
CHAPTER SYNOPSIS
Brief description of the counter
High voltage input and level sensing adjustment
Use in program
Measuring pulse w idth
Measure frequency
DESCRIPTION
MUL TI-MODE COUNTER CH APTE R 14
The RPC-2350 has a programmable high speed counter
or quadratur e encoder . The 24-bit counters are capable
of up/down, binar y, divide-by-n, and qu adrature inpu ts.
Count frequency is DC to 20 MHZ. The type of counter
is an LSI C omputer Systems L S7166. Its data sheet is in
Appendix A and on disk as LS7166.PDF
COUNT(8) is used to read the counter. The OUT
command is used to write and program the chip.
An interrupt, using ON ITR 1, may be detected on a
carry or borrow.
A high voltage input, such as a signal from a proxim ity
sensor, may be connec ted to one of the inputs.
Signals connect via J10. All input lines are pulled high
through 10K input resistors. A quadrature encoder may
be connected directly to J10.
A count is incremented when the signal at the ‘A’ input
goes from low to high.
COUNTER INPUTS AND OUTPUTS
The counter chip has four inputs and two outputs.
Reference is made to the LS7166 counter registers.
These registers are in Appendix A at the end of this
manual.
Two of the inputs, designated as A and B, are counter
inputs. The ICR (input control register) controls the
function of these inputs. Encoders, switches, and other
such devices are con nected to these inputs. These inputs
are very high speed. If you are going to use a
mechanical switch, it is best to debounce it first or use
the high voltage input described below.
The ‘A’ input (J10-9 or J10-10 through buffer) operates
as up and dow n count input and a quadrature input.
The ‘B’ input (J10-8) can a ct as a down count input,
direction control for input A, or a quadrature input.
Another input is LCTR (J10-6). It can load the counter
or output latch. The ICR register controls the function
of this line. If using it to control the output latch, you
must read each register individually and not transfer the
counter to the output latch as is done by COUN T(8).
See CNTR5.BAS.
The ABGT input (J10-4) enables/disables A/B inputs or
resets the counter. The IC R regsiter controls the
function of this line. Nor mally, it does not have to be
accessed.
The two outputs, CY and BW are counter carry and
borrow signals. They are use to generate an interrupt
(INT1) when the counter goes either through 0 or a
preset. These outputs are controlled by the OCCR
register. Status is read at the OSR register.
Interrupt selection
Jumper W7 can be used to interrupt the CPU on a
counter carry, borrow, or external interrupt. Jumper
W7[1-2] to interrupt on a carry (counter overflows). Set
jumper W7[2-3] to interrupt on a borrow (counter
underflow). Leave W7 open if using an external
interrupt. INT1 goes to J10-2 for external interrupts.
See Figure 14-2 for W7 jumper pin out.
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